Through substrate vias (TSVs) are used to facilitate wafer level packaging. Conventional TSV processing requires the use of a temporary carrier which later needs to be removed. The handling and processing of a thin TSV wafer bonded to a carrier is one of the costliest and most difficult issues encountered.
Package-on-package (PoP) structures enable higher density of components on a motherboard. PoP packages are particularly useful, for example, in the PDA/mobile phone devices where small packaging size is an important factor. However, existing PoP packages suffer from several disadvantages. If solder balls are used for the interconnection between the packages, the package pitch will be restricted by the ball size, ball height and ball pitch. For example, in existing PoP structures, the bottom package for wire-bonded dies is limited to 0.5 mm pitch. There are a few available proprietary solutions to address finer pitch PoP package such as the Through Mold Via with laser drilling or MAP PoP stacking with additional singulation steps to expose the solder ball contacts. These processes may be considered as relatively complex and hence not desirable.
From the foregoing discussion, there is a desire to provide an improved package.